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authorJames Zhu <James.Zhu@amd.com>2017-10-01 20:00:07 -0400
committerAlex Deucher <alexander.deucher@amd.com>2017-10-06 17:43:53 -0400
commitd0e62855fa7aea4736297abcbe4f0777f1332883 (patch)
treef87f9e4e4412e3a96bfc6a28c6a2b080b5507fb5 /tools/perf/scripts/python/export-to-sqlite.py
parent4b6aca2f59dca3228a370ddefc94f3a44e57c772 (diff)
drm/amdgpu: add uvd enc registers in header
Add UVD encode write/read/size/base registers definition for uvd6.3 HEVC ecoding Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-and-Tested-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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