summaryrefslogtreecommitdiff
path: root/tools/perf/scripts/python/export-to-sqlite.py
diff options
context:
space:
mode:
authorVille Syrjälä <ville.syrjala@linux.intel.com>2023-06-08 23:30:48 +0300
committerVille Syrjälä <ville.syrjala@linux.intel.com>2023-06-13 19:03:35 +0300
commitd4121327ac6af65327c1ae90bac89e1575f0f277 (patch)
tree50f68b6a3763fad274c4fc207a4c81cee259bd09 /tools/perf/scripts/python/export-to-sqlite.py
parentad52208657e92d428823e48a23b1047d184fdfd9 (diff)
drm/i915/dsi: Split icl+ D-PHY vs. DSI timing steps
The programming of the DPHY vs. DSI _TIMING registers are two separate steps in the TGL+ bspec sequence, with some other stuff in between. Implement the same split. Windows also seems follow the bspec TGL+ sequence, even on ICL/JSL. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230608203057.23759-5-ville.syrjala@linux.intel.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions