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| author | Shawn Lin <shawn.lin@rock-chips.com> | 2017-05-16 14:30:40 +0800 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2017-05-23 10:37:12 +0200 |
| commit | d633becc583e13b38c4aea53b97a197acd61a521 (patch) | |
| tree | dbb77d6a4098ec5665db0cf526f9eb8efb66e29e /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | b74a2e98dc15bad2f07f8fb82b03160d9b1fa13b (diff) | |
arm64: dts: rockchip: extent bus-ranges of PCIe for rk3399
In order to support multiple hierarchy of PCIe buses,
for instance, PCIe switch, we need to extent bus-ranges
to as max as possible. We have 32 regions and could support
up to 31 buses except bus 0 for our root bridge.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions