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| author | Swapnil Jakhade <sjakhade@cadence.com> | 2021-07-28 16:54:50 +0200 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2021-08-17 15:42:44 +0530 |
| commit | da055e5503893e27d6494f52bd6987f0da0c7658 (patch) | |
| tree | 043c7b9b75324cf5ac54668f8a47e4b22adb2d6f /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 6a2338a5bf7f9b4df5ed55d7b25ceb996ea09310 (diff) | |
phy: cadence-torrent: Add PHY registers for DP in array format
Add PHY registers for single link DP in array format to simplify
code and to improve readability. This supports already supported
frequencies for DP of 19.2MHz and 25MHz.
Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/20210728145454.15945-6-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions