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| author | Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> | 2023-09-29 08:39:09 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2023-10-05 14:28:47 +0200 |
| commit | e20396d65b959a65be84e0eda3c106360114b7ae (patch) | |
| tree | 97154b9d3216e6ce1f356f13331d1c2a4226f596 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 66ffb01b263924d136ae4899727477d4ff0ea440 (diff) | |
arm64: dts: renesas: Add initial DTSI for RZ/G3S SoC
Add the initial DTSI for the RZ/G3S SoC.
The files in this commit have the following meaning:
- r9a08g045.dtsi: RZ/G3S family SoC common parts
- r9a08g045s33.dtsi: RZ/G3S R0A08G045S33 SoC specific parts
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230929053915.1530607-23-claudiu.beznea@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions