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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-06-22 18:54:50 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-10-07 20:10:02 +0300 |
| commit | eadbd867177e1d72b2ff71b7ba0dffcae4dabc64 (patch) | |
| tree | b5690e3b9fd1f9de9f064c1cc19d6e20ac824989 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 8c45f31c320d0a49e5cd8621db07e4b3701c52a7 (diff) | |
drm/i915: Fix pipe gamma enable/disable vs. CxSR on gmch platforms
Like most other plane control register bits, the pipe gamma
enable bit is also blocked by CxSR. So make sure we kick the
machine out of CxSR before trying to change that bit.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220622155452.32587-8-ville.syrjala@linux.intel.com
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions