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| author | José Roberto de Souza <jose.souza@intel.com> | 2019-10-01 12:37:29 -0700 |
|---|---|---|
| committer | José Roberto de Souza <jose.souza@intel.com> | 2019-10-02 12:07:42 -0700 |
| commit | f21e8b80b79d77872e88d853032294ba5bde0bc4 (patch) | |
| tree | e8a09c15681574a9926a743faa3066506d55cdb6 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 0fbae9d2db851e18ec413da2eba9d875269660e0 (diff) | |
drm/i915/mg: Use tc_port instead of port parameter to MG registers
All the MG registers is based on the tc_port not port, so
MG_PHY_PORT_LN() was subtracting port and PORT_C what is very
fragile.
So replacing port to tc_port in all MG register macros and users
like we have for DKL.
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191001193729.123736-1-jose.souza@intel.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions