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author | Qiang Yu <quic_qianyu@quicinc.com> | 2024-08-05 19:45:18 +0300 |
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committer | Vinod Koul <vkoul@kernel.org> | 2024-08-29 23:49:10 +0530 |
commit | 00c5f32283f377ec60870bccbd518d9feb7fbc52 (patch) | |
tree | cebca13dadeb3eae03ed7d46be88f77b5d3f542b /tools/perf/scripts/python/exported-sql-viewer.py | |
parent | 7f7315db3d262298ab33d198d3f0b09cabfa7b6b (diff) |
phy: qcom: qmp-pcie: Configure all tables on port B PHY
Currently, only the RX and TX tables are written to the second PHY
(port B) when the 4-lanes mode is configured, but according to Qualcomm
internal documentation, the pcs, pcs_misc, serdes and ln_shrd tables need
to be written as well.
Signed-off-by: Qiang Yu <quic_qianyu@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20240805-phy-qcom-qmp-pcie-write-all-tbls-second-port-v3-1-6967c6bf61d1@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions