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authorNicholas Kazlauskas <nicholas.kazlauskas@amd.com>2021-05-19 12:40:48 -0400
committerAlex Deucher <alexander.deucher@amd.com>2021-06-04 16:39:19 -0400
commit64b1d0e8d5002f5b9e898ea543f75e55e3aa28ee (patch)
tree3035902c93b8a7df7ca4291104772fb7b1040c77 /tools/perf/scripts/python/exported-sql-viewer.py
parentfcffbcf48df325e39e4f50c6264b39d0de60e34a (diff)
drm/amd/display: Add DCN3.1 HWSEQ
Add DCN3.1 specific hardware sequence programming - extending off of our existing DCN3/DCN2 support. Extend stream hardware sequencing to include new DCCG programming. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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