summaryrefslogtreecommitdiff
path: root/tools/perf/scripts/python/exported-sql-viewer.py
diff options
context:
space:
mode:
authorNick Chan <towinchenmi@gmail.com>2025-01-19 00:31:42 +0800
committerThomas Gleixner <tglx@linutronix.de>2025-01-27 18:39:15 +0100
commit698244bbb3bfd32ddf9a0b70a12b1c7d69056497 (patch)
tree3d6d943b0e36f68248931295883ce0721078d602 /tools/perf/scripts/python/exported-sql-viewer.py
parent987f379b54091cc1b1db986bde71cee1081350b3 (diff)
irqchip/apple-aic: Only handle PMC interrupt as FIQ when configured so
The CPU PMU in Apple SoCs can be configured to fire its interrupt in one of several ways, and since Apple A11 one of the methods is FIQ, but the check of the configuration register fails to test explicitely for FIQ mode. It tests whether the IMODE bitfield is zero or not and the PMCRO_IACT bit is set. That results in false positives when the IMODE bitfield is not zero, but does not have the mode PMCR0_IMODE_FIQ. Only handle the PMC interrupt as a FIQ when the CPU PMU has been configured to fire FIQs, i.e. the IMODE bitfield value is PMCR0_IMODE_FIQ and PMCR0_IACT is set. Fixes: c7708816c944 ("irqchip/apple-aic: Wire PMU interrupts") Signed-off-by: Nick Chan <towinchenmi@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/all/20250118163554.16733-1-towinchenmi@gmail.com
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions