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| author | Arnd Bergmann <arnd@arndb.de> | 2020-07-22 21:51:57 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2020-07-22 21:51:57 +0200 |
| commit | 6ce448eeef446d212c0d6c5d1affd42cf591ed36 (patch) | |
| tree | 200318c354f48465ad758576d3d70539e7cec6a5 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | 4828f4570873be48c4007634091b3bd8a59bb7ad (diff) | |
| parent | 5720fcdc2e5af74e51c5e3102fcefd9fb061a666 (diff) | |
Merge tag 'hisi-arm32-dt-for-5.9' of git://github.com/hisilicon/linux-hisi into arm/dt
ARM: DT: Hisilicon ARM32 SoCs updates for v5.9
- Update L2 cache controller nodes to fix dtschema validator warnings
for hi3620 and hix5hd2
* tag 'hisi-arm32-dt-for-5.9' of git://github.com/hisilicon/linux-hisi:
ARM: dts: hisilicon: Align L2 cache-controller nodename with dtschema
Link: https://lore.kernel.org/r/5F165FA1.2030301@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
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