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| author | Chanh Nguyen <chanh@os.amperecomputing.com> | 2023-10-05 10:55:24 +0700 |
|---|---|---|
| committer | Joel Stanley <joel@jms.id.au> | 2023-10-13 14:59:03 +1030 |
| commit | 8098d06af171ce8aa67a95698452dacd8c1dfe26 (patch) | |
| tree | 969cbf57422b6e2facff8950adbae803b3a5a78f /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | e998856086a41dc4a76c35aae33a6ac6e455061b (diff) | |
ARM: dts: aspeed: mtmitchell: Remove redundant ADC configurations
Mt.Mitchell DVT and later hardware do not use adc1. It only uses
adc0 with channels 0, 1 and 2. This commit removes redundant ADC
configurations.
Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231005035525.19036-7-chanh@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions