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| author | Imre Deak <imre.deak@intel.com> | 2017-06-29 18:36:58 +0300 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2017-07-06 16:28:41 +0300 |
| commit | 846c6b26d38e56e5004f1d71d4c13226d2514750 (patch) | |
| tree | 83b820f8cd6e036b5cd70a4ec4a41b7d9216a270 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | cb0aeaa81842948e32f39838f0ec113e3bb52291 (diff) | |
drm/i915/gen9+: Add 10 us delay after power well 1/AUX IO pw disabling
Bspec requires a 10 us delay after disabling power well 1 and - if not
toggled on-demand - the AUX IO power wells during display uninit.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1498750622-14023-2-git-send-email-imre.deak@intel.com
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions