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author | José Roberto de Souza <jose.souza@intel.com> | 2020-02-03 14:55:49 -0800 |
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committer | José Roberto de Souza <jose.souza@intel.com> | 2020-02-06 13:16:26 -0800 |
commit | 919e4f07392dcf1c68a432e613a4e9bb6bbd9848 (patch) | |
tree | 290dd15652f6d9868878c5f5702ee03b92a3e36e /tools/perf/scripts/python/exported-sql-viewer.py | |
parent | f21613797bae98773fadc7c383bb7d4259a6096d (diff) |
drm/i915/display: Set TRANS_DDI_MODE_SELECT to default value when clearing DDI select
TGL is suffering of timeouts and fifo underruns when disabling
transcoder in MST mode, this is fixed by set TRANS_DDI_MODE_SELECT to
0(HDMI mode) when clearing DDI select.
Although BSpec disable sequence don't require this step, it is a
harmless change and it is also done by Windows driver.
Anyhow HW team was notified about that but it can take some time to
documentation to be updated.
A case that always lead to those issues is:
- do a modeset enabling pipe A and pipe B in the same MST stream
leaving A as master
- disable pipe A, promote B as master doing a full modeset in A
- enable pipe A, changing the master transcoder back to A(doing a
full modeset in B)
- Pow: underruns and timeouts
The transcoders involved will only work again when complete disabled
and their power wells turned off causing a reset in their registers.
v2: Setting TRANS_DDI_MODE_SELECT to default when clearing DDI select
not anymore when disabling TRANS_DDI, both work but this one looks
more safe. (Ville comment)
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200203225549.152301-1-jose.souza@intel.com
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
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