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| author | Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2023-09-29 01:07:00 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2023-10-05 14:25:00 +0200 |
| commit | a38b1061d327c120844e5dc0217191b06ce3b25f (patch) | |
| tree | e07fd90cd562d613d17ef022558f58768c627a86 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | 587c848ac3ea69fcecef7b4814c2a51bbda727a3 (diff) | |
riscv: dts: renesas: r9a07g043f: Add L2 cache node
Add L2 cache node for RZ/Five SoC.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230929000704.53217-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions