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authorCristian Ciocaltea <cristian.ciocaltea@collabora.com>2025-02-23 11:31:39 +0200
committerHeiko Stuebner <heiko@sntech.de>2025-02-27 13:02:36 +0100
commitaadaa27956e3430217d9e6b8af5880e39b05b961 (patch)
treed2814c48c1782a6149b48ccf4ac027134d7b4531 /tools/perf/scripts/python/exported-sql-viewer.py
parenta3b3b57ec92f46237b2478973aec65270f457bc2 (diff)
arm64: dts: rockchip: Enable HDMI1 PHY clk provider on RK3588
Since commit c4b09c562086 ("phy: phy-rockchip-samsung-hdptx: Add clock provider support"), the HDMI PHY PLL can be used as an alternative and more accurate pixel clock source for VOP2 to improve display modes handling on RK3588 SoC. Add the missing #clock-cells property to allow using the clock provider functionality of HDMI1 PHY. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Link: https://lore.kernel.org/r/20250223-vop2-hdmi1-disp-modes-v2-3-f4cec5e06fbe@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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