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| author | Claudiu Beznea <claudiu.beznea@microchip.com> | 2021-04-15 13:49:57 +0300 |
|---|---|---|
| committer | Nicolas Ferre <nicolas.ferre@microchip.com> | 2021-07-19 14:32:12 +0200 |
| commit | d8c7983f31ac9ac75fc0138070349b360ab876fa (patch) | |
| tree | e4cad9400cec0455ed559ad277184f5e2b16879c /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | 96abf16861508b92b1b44c564115c2be1f2b4966 (diff) | |
ARM: at91: ddr: add registers definitions for sama7g5's ddr
Add registers and bits definitions for SAMA7G5's UDDRC and DDR3PHY.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210415105010.569620-12-claudiu.beznea@microchip.com
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
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