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| author | Arnd Bergmann <arnd@arndb.de> | 2023-10-16 10:22:11 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2023-10-16 10:22:39 +0200 |
| commit | e084a305aa7f42b5c065bd0def1eed63ccdfd1c1 (patch) | |
| tree | d88a4cdec7e3f89aa7e29e94e206b5435bcd70ec /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | 37d01395d9c809a17c2fc79681a35cbfb704a8f3 (diff) | |
| parent | cf98fe6b579e55aa71b6197e34c112b51f0c2a66 (diff) | |
Merge tag 'riscv-dt-for-v6.6-final' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt
RISC-V Devicetrees for v6.6-final
A single fix for the Starfive VisionFive 2 platform so that chip select
for SPI matches the vendor documentation.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
* tag 'riscv-dt-for-v6.6-final' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
riscv: dts: starfive: visionfive 2: correct spi's ss pin
riscv: dts: starfive: visionfive 2: Fix uart0 pins sort order
riscv: dts: starfive: visionfive 2: Enable usb0
riscv: dts: starfive: fix NOR flash reserved-data partition size
Link: https://lore.kernel.org/r/20231015-outmatch-tragedy-228f91d396b5@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
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