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| author | Nylon Chen <nylon.chen@sifive.com> | 2025-04-11 15:38:49 +0800 |
|---|---|---|
| committer | Alexandre Ghiti <alexghiti@rivosinc.com> | 2025-05-05 13:09:38 +0000 |
| commit | eb16b3727c05ed36420c90eca1e8f0e279514c1c (patch) | |
| tree | 74d3c142dc62ef377ba598db29199cdedf19bf8d /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | 92a09c47464d040866cf2b4cd052bc60555185fb (diff) | |
riscv: misaligned: Add handling for ZCB instructions
Add support for the Zcb extension's compressed half-word instructions
(C.LHU, C.LH, and C.SH) in the RISC-V misaligned access trap handler.
Signed-off-by: Zong Li <zong.li@sifive.com>
Signed-off-by: Nylon Chen <nylon.chen@sifive.com>
Fixes: 956d705dd279 ("riscv: Unaligned load/store handling for M_MODE")
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Link: https://lore.kernel.org/r/20250411073850.3699180-2-nylon.chen@sifive.com
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions