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authorRenius Chen <reniuschengl@gmail.com>2021-01-15 13:47:36 +0800
committerUlf Hansson <ulf.hansson@linaro.org>2021-02-01 11:54:46 +0100
commitedee82f79bab6c109c07d6a99cb564cc8fd1d0cf (patch)
tree4eb0971826878a9493a340ed229a036483f87f38 /tools/perf/scripts/python/exported-sql-viewer.py
parent783667ccb5b57cc81af2646b46f56ada05f0f0ae (diff)
mmc: sdhci-pci-gli: Enlarge ASPM L1 entry delay of GL9763E
GL9763E enters ASPM L1 state after a very short idle in default, even during a burst of request. So the R/W performance of GL9763E is low with some platforms, which support ASPM mechanism, due to entering ASPM L1 state very frequently in R/W process. Set the L1 entry delay bits in vendor-specific register to 0x3FF to enlarge the idle period to 260us for improving the R/W performance of GL9763E. Signed-off-by: Renius Chen <reniuschengl@gmail.com> Link: https://lore.kernel.org/r/20210115054736.27769-1-reniuschengl@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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