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| author | Jouni Högander <jouni.hogander@intel.com> | 2025-05-13 08:48:14 +0300 |
|---|---|---|
| committer | Jouni Högander <jouni.hogander@intel.com> | 2025-05-14 11:50:50 +0300 |
| commit | a8eb102ce0944a9de2a62aa9d195861b7f26668a (patch) | |
| tree | 541f649bd8e7f5e921a2af1e4428c496171bba22 /tools/perf/scripts/python/flamegraph.py | |
| parent | 2d278488761f0b5be651a3db41e615a964123d6c (diff) | |
drm/i915/alpm: Stop writing ALPM registers when PSR is enabled
Currently we are seeing these on PTL:
xe 0000:00:02.0: [drm] *ERROR* Timeout waiting for DDI BUF A to get active
These seem to be caused by writing ALPM registers while Panel Replay is
enabled.
Fix this by writing ALPM registers only when Panel Replay is about to be
enabled.
v4: improve comment on intel_psr_panel_replay_enable_sink call
v3: enable/disable ALPM from PSR code
Fixes: 172757acd6f6 ("drm/i915/lobf: Add lobf enablement in post plane update")
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/20250513054814.3702977-3-jouni.hogander@intel.com
Diffstat (limited to 'tools/perf/scripts/python/flamegraph.py')
0 files changed, 0 insertions, 0 deletions