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authorVladimir Oltean <vladimir.oltean@nxp.com>2025-09-03 16:07:30 +0300
committerJakub Kicinski <kuba@kernel.org>2025-09-05 19:03:40 -0700
commita76f26f7a81e5adc76b5c3bcb580b7dc1c7d0451 (patch)
tree3f5f65098ad2d0d54ca8869760c617dff4539fc9 /tools/perf/scripts/python/gecko.py
parentdda916111e296329fd6c8f69dcb19d690660d47a (diff)
net: phy: aquantia: support phy-mode = "10g-qxgmii" on NXP SPF-30841 (AQR412C)
The quad port PHYs (AQR4*) have 4 system interfaces, and some of them, like AQR412C, can be used with a special firmware provisioning which multiplexes all ports over a single host-side SerDes lane. The protocol used over this lane is Cisco 10G-QXGMII feature, or "MUSX", as Aquantia seems to call it. One such example is the AQR412C PHY from the NXP SPF-30841 10G-QXGMII add-in card, which uses this firmware file: https://github.com/nxp-qoriq/qoriq-firmware-aquantia/blob/master/AQR-G3_v4.3.C-AQR_NXP_SPF-30841_MUSX_ID40019_VER1198.cld There seems to be no disagreement, including from Marvell FAE, that 10G-QXGMII is reported to the host over MDIO as USXGMII and indistinguishable from it. This includes the registers from the provisioning based on which the firmware configures a single system interface (lane C in the case of SPF-30841) to multiplex all ports - they are also only accessible from the firmware, or over I2C (?!). However, the Linux MAC and especially SerDes drivers may need to know if it is using 1 port per lane (USXGMII) or 4 ports per lane (10G-QXGMII). In the downstream Layerscape SDK we have previously implemented a simpler scheme where for certain PHY interface modes, we trust the device tree and never let the PHY driver overwrite phydev->interface: https://github.com/nxp-qoriq/linux/commit/862694a4961db590c4d8a5590b84791361ca773d but for upstream, a nicer detection method is implemented, where although we can not distinguish USXGMII from 10G-QXGMII per se, we create a whitelist of firmware fingerprints for which USXGMII is translated into 10G-QXGMII. At the time of writing, it is expected that this should only happen for the NXP SPF-30841 card, although extending for more is trivial - just uncomment the phydev_dbg() in aqr_build_fingerprint(). An advantage of this method is that it doesn't strictly require updates to arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-13bb.dtso, since the PHY driver will transition from "usxgmii" to "10g-qxgmii". All aqr_translate_interface() callers have also previously called aqr107_probe(), so dereferencing phydev->priv is safe. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://patch.msgid.link/20250903130730.2836022-7-vladimir.oltean@nxp.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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