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| author | Inbaraj E <inbaraj.e@samsung.com> | 2025-08-14 19:39:32 +0530 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2025-08-18 10:46:32 +0200 |
| commit | 5576d8098052952a6c95af86ad3dcb341554ac75 (patch) | |
| tree | ad82b3cab498ff413c6c78e5d18a1610e3e8efc8 /tools/perf/scripts/python/libxed.py | |
| parent | 8f5ae30d69d7543eee0d70083daf4de8fe15d585 (diff) | |
dt-bindings: clock: Add CAM_CSI clock macro for FSD
CAM_CSI block has ACLK, PCLK and PLL clocks. PCLK id is already
assigned. To use PCLK and PLL clock in driver add id macro for CAM_CSI_PLL
and CAM_CSI_PCLK.
Signed-off-by: Inbaraj E <inbaraj.e@samsung.com>
Link: https://lore.kernel.org/r/20250814140943.22531-2-inbaraj.e@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/libxed.py')
0 files changed, 0 insertions, 0 deletions