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authorNicholas Kazlauskas <nicholas.kazlauskas@amd.com>2022-12-06 16:10:22 -0500
committerAlex Deucher <alexander.deucher@amd.com>2023-01-03 16:57:57 -0500
commit2d90a1c054831338d57b39aec4d273cf3e867590 (patch)
tree5104b0509a13bc5a3a5b05e590923eb8f7cc6c56 /tools/perf/scripts/python/mem-phys-addr.py
parenta1cbe6916f44a5002a8123e5804063196ad9cf71 (diff)
drm/amd/display: Defer DIG FIFO disable after VID stream enable
[Why] On some monitors we see a brief flash of corruption during the monitor disable sequence caused by FIFO being disabled in the middle of an active DP stream. [How] Wait until DP vid stream is disabled before turning off the FIFO. The FIFO reset on DP unblank should take care of clearing any FIFO error, if any. Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Syed Hassan <Syed.Hassan@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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