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| author | Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2025-08-04 21:26:43 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2025-08-20 09:16:31 +0200 |
| commit | 45bf4bff2814b78dc2a98e692f7e49399e2d2ce1 (patch) | |
| tree | 2030c7686a9e8af06c768a2aacb0475e0477795a /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | 845d5c1a3218466e3a2bb4924ac2c58dc879996b (diff) | |
clk: renesas: r9a09g077: Add USB core and module clocks
Add module and core clocks used by USB.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250804202643.3967484-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions