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| author | AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2025-07-24 10:38:28 +0200 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2025-09-21 09:30:30 -0700 |
| commit | 6c4c26b624790098988c1034541087e3e5ed5bed (patch) | |
| tree | 5d58d84d114d2e45220ec8c567b57d48111a1cf2 /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | 8f5ae30d69d7543eee0d70083daf4de8fe15d585 (diff) | |
clk: mediatek: mt8195-infra_ao: Fix parent for infra_ao_hdmi_26m
The infrastructure gate for the HDMI specific crystal needs the
top_hdmi_xtal clock to be configured in order to ungate the 26m
clock to the HDMI IP, and it wouldn't work without.
Reparent the infra_ao_hdmi_26m clock to top_hdmi_xtal to fix that.
Fixes: e2edf59dec0b ("clk: mediatek: Add MT8195 infrastructure clock support")
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions