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| author | Laura Nao <laura.nao@collabora.com> | 2025-09-15 17:19:31 +0200 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2025-09-21 09:36:02 -0700 |
| commit | 895ab0134d64834b3f265a6cb5ed609c80876efb (patch) | |
| tree | 37ba54a533f77ddf0a7ccd1e7e6742d79a809404 /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | d78485d63b79dd896301439e57e3dea45db0b575 (diff) | |
clk: mediatek: Add MT8196 topckgen clock support
Add support for the MT8196 topckgen clock controller, which provides
muxes and dividers for clock selection in other IP blocks.
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Laura Nao <laura.nao@collabora.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions