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authorNicolas Frattaroli <nicolas.frattaroli@collabora.com>2025-07-16 19:51:25 +0200
committerViresh Kumar <viresh.kumar@linaro.org>2025-08-11 12:19:03 +0530
commit32e0d669f3ac9574862a64a56c9a6dff675f8600 (patch)
tree234fe96fb8a7856f6e032783b0f29a1d8d9452bc /tools/perf/scripts/python/parallel-perf.py
parent35eb6b78854d2e9671ce8ee6b735aa0114c48da8 (diff)
cpufreq: mediatek-hw: Add support for MT8196
The MT8196 SoC uses DVFS to set a desired target frequency for each CPU core. It also uses slightly different register offsets. Add support for it, which necessitates reworking how the mmio regs are acquired, as mt8196 has the fdvfs register before the performance domain registers. I've verified with both `sysbench cpu run` and `head -c 10G \ /dev/urandom | pigz -p 8 -c - | pv -ba > /dev/null` that we don't just get a higher reported clock frequency, but that the observed performance also increases, by a factor of 2.64 in an 8 thread sysbench test. Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogiaocchino.delregno@collabora.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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