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| author | Biju Das <biju.das.jz@bp.renesas.com> | 2024-12-13 12:35:42 +0000 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2025-01-07 17:00:55 +0100 |
| commit | 3baf0273c0627b7e6029304166df17e07c6796fb (patch) | |
| tree | b5421af1e591c9239f2470cd7532b9ef1d7abcf5 /tools/perf/scripts/python/parallel-perf.py | |
| parent | bb6a9aaf670735d6583c76073ec41190f5404dc5 (diff) | |
clk: renesas: r9a09g047: Add CA55 core clocks
Add CA55 core clocks which are derived from PLLCA55.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/20241213123550.289193-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/parallel-perf.py')
0 files changed, 0 insertions, 0 deletions