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authorJason Gunthorpe <jgg@nvidia.com>2025-04-08 13:54:03 -0300
committerJoerg Roedel <jroedel@suse.de>2025-04-17 16:22:46 +0200
commitb3efacc451e19a85fb5acb56d95f40532c4e31d2 (patch)
tree382127b1f82ffcaeb2042a617b9ec64dda0b4b29 /tools/perf/scripts/python/parallel-perf.py
parent580ccca4ee53d7f2a2c90044220887daec0dcd9a (diff)
iommu/pages: Allow sub page sizes to be passed into the allocator
Generally drivers have a specific idea what their HW structure size should be. In a lot of cases this is related to PAGE_SIZE, but not always. ARM64, for example, allows a 4K IO page table size on a 64K CPU page table system. Currently we don't have any good support for sub page allocations, but make the API accommodate this by accepting a sub page size from the caller and rounding up internally. This is done by moving away from order as the size input and using size: size == 1 << (order + PAGE_SHIFT) Following patches convert drivers away from using order and try to specify allocation sizes independent of PAGE_SIZE. Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com> Tested-by: Alejandro Jimenez <alejandro.j.jimenez@oracle.com> Tested-by: Nicolin Chen <nicolinc@nvidia.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Link: https://lore.kernel.org/r/15-v4-c8663abbb606+3f7-iommu_pages_jgg@nvidia.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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