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authorAntoniu Miclaus <antoniu.miclaus@analog.com>2025-05-16 11:26:24 +0300
committerJonathan Cameron <Jonathan.Cameron@huawei.com>2025-06-09 07:45:34 +0100
commitb81c5c258285d9fe7a397c76c0b1d33132cbb941 (patch)
tree67b600dfee4e16c18a67d65b0304864110999859 /tools/perf/scripts/python/parallel-perf.py
parent5ef4cc6d2414d115cf09a6a33c3155f12e58a27d (diff)
dt-bindings: iio: adc: add ad408x axi variant
Add a new compatible and related bindings for the fpga-based AD408x AXI IP core, a variant of the generic AXI ADC IP. The AXI AD408x IP is a very similar HDL (fpga) variant of the generic AXI ADC IP, intended to control ad408x familiy. Although there are some particularities added for extended control of the ad408x devices such as the filter configuration. Wildcard naming is used to match the naming of the published firmware. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250516082630.8236-5-antoniu.miclaus@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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