diff options
| author | Daniel Machon <daniel.machon@microchip.com> | 2024-12-20 14:48:47 +0100 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2024-12-23 10:57:56 -0800 |
| commit | 010fe5dff1644f60520302fd43776a54402b623f (patch) | |
| tree | 1addc8e9ab736ebd7e9f9370b9ca8bdb5faeab2b /tools/perf/scripts/python/stackcollapse.py | |
| parent | fb6ac1829bb5865768e75517aefb416a3a19569e (diff) | |
net: lan969x: add RGMII implementation
The lan969x switch device includes two RGMII port interfaces (port 28
and 29) supporting data speeds of 1 Gbps, 100 Mbps and 10 Mbps. MAC
level delays are configurable through the HSIO_WRAP target, by choosing
a phase shift selector, corresponding to a certain time delay in nano
seconds.
Add new file: lan969x_rgmii.c that contains the implementation for
configuring the RGMII port devices. MAC level delays are configured
using the "{rx,tx}-internal-delay-ps" properties. These properties must
be specified independently of the phy-mode. If missing, or set to zero,
the MAC will not apply any delay.
Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
Reviewed-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Tested-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Link: https://patch.msgid.link/20241220-sparx5-lan969x-switch-driver-4-v5-8-fa8ba5dff732@microchip.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions