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| author | Kan Liang <kan.liang@linux.intel.com> | 2021-04-12 07:30:50 -0700 |
|---|---|---|
| committer | Peter Zijlstra <peterz@infradead.org> | 2021-04-19 20:03:26 +0200 |
| commit | 183af7366b4e813ee4e0b995ff731e3ac28251f0 (patch) | |
| tree | 8e59b0656dd2e43633b29f77e4f6d4d3a15fd2ad /tools/perf/scripts/python/stackcollapse.py | |
| parent | 24ee38ffe61a68fc35065fcab1908883a34c866b (diff) | |
perf/x86: Hybrid PMU support for extra_regs
Different hybrid PMU may have different extra registers, e.g. Core PMU
may have offcore registers, frontend register and ldlat register. Atom
core may only have offcore registers and ldlat register. Each hybrid PMU
should use its own extra_regs.
An Intel Hybrid system should always have extra registers.
Unconditionally allocate shared_regs for Intel Hybrid system.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Link: https://lkml.kernel.org/r/1618237865-33448-11-git-send-email-kan.liang@linux.intel.com
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions