diff options
| author | Luo Jie <quic_luoj@quicinc.com> | 2025-08-18 21:14:25 +0800 |
|---|---|---|
| committer | Paolo Abeni <pabeni@redhat.com> | 2025-08-21 12:38:41 +0200 |
| commit | 1898fc572118a65aa0d927dd5ff4b7e1a0140ddd (patch) | |
| tree | a277299c1734e7274203c6449227e4e32ef7daa3 /tools/perf/scripts/python/stackcollapse.py | |
| parent | d051b1f9df3470bbd74eab7d80845b022ca089b2 (diff) | |
dt-bindings: net: Add PPE for Qualcomm IPQ9574 SoC
The PPE (packet process engine) hardware block is available in Qualcomm
IPQ chipsets that support PPE architecture, such as IPQ9574. The PPE in
the IPQ9574 SoC includes six Ethernet ports (6 GMAC and 6 XGMAC), which
are used to connect with external PHY devices by PCS. It includes an L2
switch function for bridging packets among the 6 Ethernet ports and the
CPU port. The CPU port enables packet transfer between the Ethernet ports
and the ARM cores in the SoC, using the Ethernet DMA.
The PPE also includes packet processing offload capabilities for various
networking functions such as route and bridge flows, VLANs, different
tunnel protocols and VPN.
The PPE switch is modeled according to the Ethernet switch schema, with
additional properties defined for the switch node for interrupts, clocks,
resets, interconnects and Ethernet DMA. The switch port node is extended
with additional properties for clocks and resets.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
Link: https://patch.msgid.link/20250818-qcom_ipq_ppe-v8-1-1d4ff641fce9@quicinc.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions
