diff options
| author | Siddharth Vadapalli <s-vadapalli@ti.com> | 2023-10-19 11:10:19 +0530 |
|---|---|---|
| committer | Vignesh Raghavendra <vigneshr@ti.com> | 2023-10-19 15:46:32 +0530 |
| commit | 1b27f0db6d4222f873a64f5b711d752d2e379988 (patch) | |
| tree | bc68fc8631b2db061179167764e5b4bf751e61ea /tools/perf/scripts/python/stackcollapse.py | |
| parent | 7287d423f1388ddfdc5bd1dd6b9f6aa659ef3bbd (diff) | |
arm64: dts: ti: k3-j784s4-main: Add WIZ and SERDES PHY nodes
J784S4 SoC has 4 Serdes instances along with their respective WIZ
instances. Add device-tree nodes for them and disable them by default
as the node is incomplete and phy link properties will be added in
the platform dt file.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
[j-choudhary@ti.com: fix serdes_wiz clock order & disable serdes refclk]
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20231019054022.175163-3-j-choudhary@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions