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| author | Russell King (Oracle) <rmk+kernel@armlinux.org.uk> | 2024-10-17 12:52:39 +0100 |
|---|---|---|
| committer | Paolo Abeni <pabeni@redhat.com> | 2024-10-23 16:10:16 +0200 |
| commit | 1d2709d6d3902786bfc3e9ede627e7364633cff7 (patch) | |
| tree | 8cdb0468fde4bf9c32ed23a2aec305b68001825e /tools/perf/scripts/python/stackcollapse.py | |
| parent | b0b3683419b45e2971b6d413c506cb818b268d35 (diff) | |
net: pcs: xpcs: use generic register definitions
As a general policy, we refer our generic register definitions over
vendor specific definitions. In XPCS, it appears that the register
layout follows a BMCR, BMSR and ADVERTISE register definition. We
already refer to this BMCR register using several different macros
which is confusing.
Convert the following register definitions to generic versions:
DW_VR_MII_MMD_CTRL => MII_BMCR
MDIO_CTRL1 => MII_BMCR
AN_CL37_EN => BMCR_ANENABLE
SGMII_SPEED_SS6 => BMCR_SPEED1000
SGMII_SPEED_SS13 => BMCR_SPEED100
MDIO_CTRL1_RESET => BMCR_RESET
DW_VR_MII_MMD_STS => MII_BMSR
DW_VR_MII_MMD_STS_LINK_STS => BMSR_LSTATUS
DW_FULL_DUPLEX => ADVERTISE_1000XFULL
iDW_HALF_DUPLEX => ADVERTISE_1000XHALF
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Tested-by: Serge Semin <fancer.lancer@gmail.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions