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| author | Imre Deak <imre.deak@intel.com> | 2025-08-05 10:36:59 +0300 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2025-08-13 15:03:29 +0300 |
| commit | 24d1cdacac11ddc3388714c5f82d31a480659ac7 (patch) | |
| tree | b2059fe12100a446e7c1fb8aa071ca1b673d8cc6 /tools/perf/scripts/python/stackcollapse.py | |
| parent | cca7c083a3f622164a3615ed243e6a5ccdd1dd10 (diff) | |
drm/i915/tc: Cache the pin assignment value
Cache the pin assignment value. This is more consistent with the way the
max lane count value is tracked and a bit more efficient than reading
out the same value from HW each time it's queried.
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://lore.kernel.org/r/20250805073700.642107-19-imre.deak@intel.com
Signed-off-by: Imre Deak <imre.deak@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions