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| author | Dario Binacchi <dario.binacchi@amarulasolutions.com> | 2022-11-17 12:36:36 +0100 |
|---|---|---|
| committer | Abel Vesa <abel.vesa@linaro.org> | 2022-11-25 11:18:27 +0200 |
| commit | 34d996747a74e3a86990f9f9c48de09159d78edb (patch) | |
| tree | d66d995e6f3ad1a7e1c9217fb08ceb62ef3eb101 /tools/perf/scripts/python/stackcollapse.py | |
| parent | bedcf9d1dcf88ed38731f0ac9620e5a421e1e9d6 (diff) | |
clk: imx8mn: fix imx8mn_sai2_sels clocks list
According to the "Clock Root" table of the reference manual (document
IMX8MNRM Rev 2, 07/2022):
Clock Root offset Source Select (CCM_TARGET_ROOTn[MUX])
... ... ...
SAI2_CLK_ROOT 0xA600 000 - 24M_REF_CLK
001 - AUDIO_PLL1_CLK
010 - AUDIO_PLL2_CLK
011 - VIDEO_PLL_CLK
100 - SYSTEM_PLL1_DIV6
110 - EXT_CLK_2
111 - EXT_CLK_3
... ... ...
while the imx8mn_sai2_sels list contained clk_ext3 and clk_ext4 for
source select bits 110b and 111b.
Fixes: 96d6392b54dbb ("clk: imx: Add support for i.MX8MN clock driver")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Acked-by: Marco Felsch <m.felsch@pengutronix.de>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20221117113637.1978703-5-dario.binacchi@amarulasolutions.com
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions