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authorAtish Patra <atishp@rivosinc.com>2024-12-12 16:09:34 -0800
committerPalmer Dabbelt <palmer@rivosinc.com>2025-01-09 09:37:09 -0800
commit3aff4cdbe506652da77570baccad623511628250 (patch)
treef28fb27755efb607fa5b684fd9d560b4c5869ada /tools/perf/scripts/python/stackcollapse.py
parent2c206cdede567f53035c622e846678a996f39d69 (diff)
drivers/perf: riscv: Do not allow invalid raw event config
The SBI specification allows only lower 48bits of hpmeventX to be configured via SBI PMU. Currently, the driver masks of the higher bits but doesn't return an error. This will lead to an additional SBI call for config matching which should return for an invalid event error in most of the cases. However, if a platform(i.e Rocket and sifive cores) implements a bitmap of all bits in the event encoding this will lead to an incorrect event being programmed leading to user confusion. Report the error to the user if higher bits are set during the event mapping itself to avoid the confusion and save an additional SBI call. Suggested-by: Samuel Holland <samuel.holland@sifive.com> Signed-off-by: Atish Patra <atishp@rivosinc.com> Link: https://lore.kernel.org/r/20241212-pmu_event_fixes_v2-v2-3-813e8a4f5962@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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