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| author | Imre Deak <imre.deak@intel.com> | 2025-08-05 10:36:48 +0300 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2025-08-13 15:02:36 +0300 |
| commit | 45d424856a074ea58c5a853e11bd0388a56a6951 (patch) | |
| tree | 34783053f7b708da68134d7dfcbd8d8a14c1347a /tools/perf/scripts/python/stackcollapse.py | |
| parent | aaf01f66e0ee688f0df7eb941914c78fdecf1edd (diff) | |
drm/i915/tc: Move getting the power domain before reading DFLEX registers
Move getting the required display power domain right before reading the
PORT_TX_DFLEXDPSP and PORT_TX_DFLEXPA1 registers, similarly to how this
is done while reading the other TCSS_DDI_STATUS PHY register.
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://lore.kernel.org/r/20250805073700.642107-8-imre.deak@intel.com
Signed-off-by: Imre Deak <imre.deak@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions
