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authorTanmay Jagdale <tanmay@marvell.com>2021-09-01 18:40:49 +0530
committerMathieu Poirier <mathieu.poirier@linaro.org>2021-10-27 11:44:34 -0600
commit4d5d88baa6c838bf92ed6a63c50dd3167c5a4956 (patch)
treec17b75202049543d81790072af1a54a6367e98f1 /tools/perf/scripts/python/stackcollapse.py
parent0ab47f8079f27edc44ea0bcc67078561bcfdf542 (diff)
coresight: tmc: Configure AXI write burst size
The current driver sets the write burst size initiated by TMC-ETR on AXI bus to a fixed value of 16. Make this configurable by reading the value specified in fwnode. If not specified, then default to 16. Introduced a "max_burst_size" variable in tmc_drvdata structure to facilitate this change. Signed-off-by: Tanmay Jagdale <tanmay@marvell.com> Reviewed-by: Mike Leach <mike.leach@linaro.org> Link: https://lore.kernel.org/r/20210901131049.1365367-3-tanmay@marvell.com Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
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