diff options
| author | E Shattow <e@freeshell.de> | 2025-01-02 10:37:36 -0800 |
|---|---|---|
| committer | Conor Dooley <conor.dooley@microchip.com> | 2025-02-18 16:32:24 +0000 |
| commit | 65e8b991267093b759a03c20508d2643a41aa046 (patch) | |
| tree | e5fe37a1aad2e6c39ad395cd889800e4753819cc /tools/perf/scripts/python/stackcollapse.py | |
| parent | 57b5369f36686961bebddc98d894d095d0b402a8 (diff) | |
riscv: dts: starfive: jh7110: pciephy0 USB 3.0 configuration registers
StarFive JH7110 contains a Cadence USB2.0+USB3.0 controller IP block that
may exclusively use pciephy0 for USB3.0 connectivity. Add the register
offsets for the driver to enable/disable USB3.0 on pciephy0.
Signed-off-by: E Shattow <e@freeshell.de>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions