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| author | Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> | 2018-08-27 21:54:35 +0300 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2018-09-13 09:47:45 +0200 |
| commit | c6eb20473f0b296c671dc6f7a7766ea6bedf2d59 (patch) | |
| tree | fcc5d1f7d9359346631e3c47afcd63f4a10544b5 /tools/perf/scripts/python/stackcollapse.py | |
| parent | ffa967e24c5817b48a3d5ecea2c12b9cdd807f0c (diff) | |
arm64: dts: renesas: condor: add PCIe support
Enable PCIe PHY and PCIEC and specify the PCIe bus clock for the Condor
board.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions