summaryrefslogtreecommitdiff
path: root/tools/perf/scripts/python/stackcollapse.py
diff options
context:
space:
mode:
authorAlexander Dahl <ada@thorsis.com>2024-08-21 07:51:36 +0200
committerClaudiu Beznea <claudiu.beznea@tuxon.dev>2024-08-24 20:20:31 +0300
commitd355c895fa4ddd8bec15569eee540baeed7df8c5 (patch)
treee8458b1323af2d24a572fcaf0026ae5410ce8790 /tools/perf/scripts/python/stackcollapse.py
parentbef17a417cc9788f2ea5df5c92fb16f198775d06 (diff)
ARM: dts: microchip: sam9x60: Fix rtc/rtt clocks
The RTC and RTT peripherals use the timing domain slow clock (TD_SLCK), sourced from the 32.768 kHz crystal oscillator or slow rc oscillator. The previously used Monitoring domain slow clock (MD_SLCK) is sourced from an internal RC oscillator which is most probably not precise enough for real time clock purposes. Fixes: 1e5f532c2737 ("ARM: dts: at91: sam9x60: add device tree for soc and board") Fixes: 5f6b33f46346 ("ARM: dts: sam9x60: add rtt") Signed-off-by: Alexander Dahl <ada@thorsis.com> Link: https://lore.kernel.org/r/20240821055136.6858-1-ada@thorsis.com [claudiu.beznea: removed () around the last commit description paragraph, removed " in front of "timing domain slow clock", described that TD_SLCK can also be sourced from slow rc oscillator] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions