diff options
| author | Ping Gao <ping.a.gao@intel.com> | 2016-10-27 14:37:41 +0800 |
|---|---|---|
| committer | Zhenyu Wang <zhenyuw@linux.intel.com> | 2016-11-07 14:16:59 +0800 |
| commit | f24940e00062f47f1e45fb20c405c2ed6bc006a3 (patch) | |
| tree | 870c8e20770d28ce62ebd3e7225be77fb53ee873 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 5f399f1158959a112d98ade5380464da29ba646c (diff) | |
drm/i915/gvt: correct the emulation in TLB control handler
Need a explicit write_vreg in TLB MMIO write handler, beside that
TLB vreg should update correspondingly following HW status to do
correct emulation.
Signed-off-by: Ping Gao <ping.a.gao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions