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| author | Victor Lu <victorchengchi.lu@amd.com> | 2025-02-13 18:49:46 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2025-03-07 12:53:24 -0500 |
| commit | 94b0908b85524d467a00c6aa2a277ef98fd8b152 (patch) | |
| tree | 0653d8ecfea773c00fc519b9f2718690b40b2664 /tools/perf/scripts/python/stat-cpi.py | |
| parent | 14c8097ba4db1b6e1c28b2ed65186b9199fe9155 (diff) | |
drm/amdgpu: Do not set power brake sequence for Aldebaran SRIOV
Aldebaran SRIOV VF cannot access the power brake feature regs.
The accesses can be skipped to avoid a dmesg warning.
v2: Remove redundant asic type check
Signed-off-by: Victor Lu <victorchengchi.lu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/stat-cpi.py')
0 files changed, 0 insertions, 0 deletions