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author | Biju Das <biju.das@bp.renesas.com> | 2018-08-23 14:43:05 +0100 |
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committer | Simon Horman <horms+renesas@verge.net.au> | 2018-09-13 09:47:36 +0200 |
commit | 09f49bcf6f5a62467f4fcda59d6bc38f24d97c36 (patch) | |
tree | 881c6d6314b6cb22758e73b89a1eaf79d5afc248 /tools/perf/scripts/python/syscall-counts.py | |
parent | c512110d64a00cc0714061d54261b0f03c7202be (diff) |
arm64: dts: renesas: r8a774a1: Add Cortex-A53 CPU cores
This patch adds definitions for L2 cache for the Cortex-A53 CPU
cores (512 KiB in size, organized as 32 KiB x 16 ways), adds
Cortex-A53 CPU cores (setting a total of 6 cores, 2 x Cortex-A57
+ 4 x Cortex-A53), and finally enables the performance monitor
unit for the Cortex-A53 cores on the R8A774A1 SoC.
Based on work done for r8a7796 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions