summaryrefslogtreecommitdiff
path: root/tools/perf/scripts/python/syscall-counts.py
diff options
context:
space:
mode:
authorAndré Draszik <andre.draszik@linaro.org>2024-01-30 09:36:43 +0000
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>2024-02-01 11:19:05 +0100
commit21e4e8807bfc7acc0fc9fe3ab69e1dc0662e7ce4 (patch)
tree93a55abb4502a0ed5a5f75d018ad2065704a593e /tools/perf/scripts/python/syscall-counts.py
parent512b5a875cd8b8352257fefe71513097ee97be77 (diff)
arm64: dts: exynos: gs101: use correct clocks for usi_uart
Wrong pclk clocks have been used in this usi_uart instance here. For USI and UART, we need the ipclk and pclk, where pclk is the bus clock. Without it, nothing can work. It is unclear what exactly is using USI0_UART_CLK, but it is not required for the IP to be operational at this stage, while pclk is. This also brings the DT in line with the clock names expected by the usi and uart drivers. Fixes: d97b6c902a40 ("arm64: dts: exynos: gs101: update USI UART to use peric0 clocks") Signed-off-by: André Draszik <andre.draszik@linaro.org> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Tested-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240130093812.1746512-5-andre.draszik@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions