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| author | Dmitry Osipenko <digetx@gmail.com> | 2021-03-02 15:25:00 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2021-03-26 13:10:25 +0100 |
| commit | 66ee50c6e23432efded0c34ea71428f97cac808a (patch) | |
| tree | 9960e5bb254af32800803d63a7e334816497a2f0 /tools/perf/scripts/python/syscall-counts.py | |
| parent | c45e66a6b9f40f2e95bc6d97fbf3daa1ebe88c6b (diff) | |
soc/tegra: pmc: Ensure that clock rates aren't too high
Switch all clocks of a power domain to a safe rate which is suitable
for all possible voltages in order to ensure that hardware constraints
aren't violated when power domain state toggles.
Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions