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authorAdam Ford <aford173@gmail.com>2024-02-11 17:15:08 -0600
committerShawn Guo <shawnguo@kernel.org>2024-02-25 11:22:52 +0800
commit6fb464ff9a5f7581c3593796b08c28891276d0ad (patch)
treed0ef003fd5b2a201fdeaec79c86793483714ae09 /tools/perf/scripts/python/syscall-counts.py
parent5ab5a11acbeda73446b4f3c55598b0444bb2de93 (diff)
arm64: dts: imx8mn: Slow default video_pll clock rate
Since commit 8208181fe536 ("clk: imx: composite-8m: Add imx8m_divider_determine_rate") the lcdif controller has had the ability to set the disp_pixel_clk rate which propagates up the tree and sets the video_pll rate automatically. By setting this value low, it will force the recalculation of video_pll to the lowest rate needed by lcdif instead of dividing a larger clock down to the desired clock speed. This has the advantage of being able to lower the video_pll rate from 594MHz to 148.5MHz when operating at 1080p. It can go even lower when operating at lower resolutions and refresh rates. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
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